1. Technical Field
The present invention relates to a shift register, and more particularly, to a display device having the shift register.
2. Discussion of the Related Art
Recently, the demand for flat panel displays, which are lighter and thinner than traditional television and video displays using cathode ray tubes (CRTs), has increased. Some of the more common flat panel displays include: plasma display panels (PDPs), organic light emitting displays (OLEDs), and liquid crystal displays (LCDs).
PDPs display characters or images using plasma generated by gas-discharge and OLEDs display characters or images by applying an electric field to specific light-emitting organic or high molecule materials. LCDs display images or characters by applying an electric field to a liquid crystal layer disposed between two panels, and regulating the strength of the electric field to adjust a transmittance of light passing through the liquid crystal layer.
The LCD and OLED flat panel displays each include a panel unit provided with pixels including switching elements and display signal lines, and a gate driver for providing a gate signal to gate lines of the display signal lines to turn the switching elements on and off.
Small and medium sized LCDs, for example, are currently being used in portable communications terminals such as folding dual display mobile phones. These so-called dual display devices have display panel units on each of their inner and outer sides.
The dual display device includes a main panel unit mounted on its inner side, a subsidiary panel unit mounted on its outer side, a driving flexible printed circuit film (FPC) provided with signal lines to transmit input signals from external devices, an auxiliary FPC connecting the main panel unit to the subsidiary panel unit, and an integration chip which controls the display device.
In more detail, the integration chip generates control signals and driving signals to control the main panel unit and the subsidiary panel unit. The integration chip is generally mounted on the main panel unit as a chip on glass (COG).
One technique for reducing production cost of the medium and small sized display devices is to form the gate driver with the switching elements to be integrated on the edge of the panel unit.
The gate driver, which is essentially a shift register including a plurality of stages connected to each other in a column, receives, at a first stage, a scan start signal and outputs a gate output, and, at a next stage, receives a carry output and outputs the carry output as a gate output, so that the gate outputs are sequentially generated.
Each of the stages includes a plurality of NMOS or PMOS transistors and at least one capacitor, and generates a gate output having a phase difference of 90° to 180° in synchronization with a plurality of clock signals.
When the transistors are made of an amorphous silicate, the transistors are maintained in a turned-on state after the gate output is generated, so that the voltages applied to the gate lines are maintained at a low voltage. However, since the transistors are turned on for a long time, the threshold voltage of the transistors may increase thus causing the transistors to malfunction.
Currently, the increase in the threshold voltage is alleviated, for example, by using seven transistors. However, in this configuration, when two clock signals having different phases are low, a parasitic capacitance between the gate line and the common electrode provided to an upper panel of the display panels may cause a change in the voltage applied to the gate lines. This change may result in errors which can be particularly pronounced in the medium and small sized display devices when performing low voltage driving.
Accordingly, there is a need for a shift register that is capable of performing low voltage driving without being adversely affected by parasitic capacitance.